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Cypress Semiconductor /psoc63 /USBFS0 /USBDEV /SIE_EP4_CR0

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Interpret as SIE_EP4_CR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)MODE0 (ACKED_NO)ACKED_TXN 0 (NAK_INT_EN)NAK_INT_EN 0 (ERR_IN_TXN)ERR_IN_TXN 0 (STALL)STALL

MODE=DISABLE, ACKED_TXN=ACKED_NO

Description

Non-control endpoint’s control Register

Fields

MODE

The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint.

0 (DISABLE): Ignore all USB traffic to this endpoint

1 (NAK_INOUT): SETUP: Accept IN: NAK OUT: NAK

2 (STATUS_OUT_ONLY): SETUP: Accept IN: STALL OUT: ACK 0B tokens, NAK others

3 (STALL_INOUT): SETUP: Accept IN: STALL OUT: STALL

5 (ISO_OUT): SETUP: Ignore IN: Ignore OUT: Accept Isochronous OUT token

6 (STATUS_IN_ONLY): SETUP: Accept IN: Respond with 0B data OUT: Stall

7 (ISO_IN): SETUP: Ignore IN: Accept Isochronous IN token OUT: Ignore

8 (NAK_OUT): SETUP: Ignore IN: Ignore OUT: NAK

9 (ACK_OUT): SETUP: Ignore IN: Ignore OUT: Accept data and ACK if STALL=0, STALL otherwise. Change to MODE=8 after one succesfull OUT token.

11 (ACK_OUT_STATUS_IN): SETUP: Accept IN: Respond with 0B data OUT: Accept data

12 (NAK_IN): SETUP: Ignore IN: NAK OUT: Ignore

13 (ACK_IN): SETUP: Ignore IN: Respond to IN with data if STALL=0, STALL otherwise OUT: Ignore

15 (ACK_IN_STATUS_OUT): SETUP: Accept IN: Respond to IN with data OUT: ACK 0B tokens, NAK others
ACKED_TXN

The ACK’d transaction bit is set whenever the SIE engages in a transaction to the register’s endpoint that completes with an ACK packet. This bit is cleared by any writes to the register.

0 (ACKED_NO): No ACK’d transactions since bit was last cleared.

1 (ACKED_YES): Indicates a transaction ended with an ACK.
NAK_INT_EN

When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK.
ERR_IN_TXN

The Error in transaction bit is set whenever an error is detected. For an IN transaction, this indicates a no response from HOST scenario. For an OUT transaction, this represents an RxErr (PID error/ CRC error/ bit-stuff error scenario). This bit is cleared by any writes to the register.
STALL

When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data